With the downscaling of integrated circuits, metal-oxide-semiconductor (MOS) devices become increasingly smaller. The junction depths of the MOS devices are also reduced accordingly. This reduction causes technical difficulties for the formation processes of MOS devices. For example, in order to reduce source and drain resistance, small MOS devices demand high source and drain dopant concentrations and/or increased junction depths. However, high dopant concentrations, particularly in lightly doped source and drain (LDD) regions, result in the increase in the leakage currents, while the increase in the junction depths of LDD regions results in the compromise of short channel characteristics of the resulting MOS devices.